Interfacing memory chips with 8085 microprocessor

The most interesting thing in 8085 microprocessor is interfacing memory chips with 8085 microprocessor. Because we know that 8085 microprocessor does not have any internal memory chip. So we have to interface externally. We know 8085 has 16 address lines (A0 – A15), hence a maximum of 64 KB (= 216 bytes) of memory locations can be interfaced with 8085 microprocessor. The memory address space of the 8085 takes values from 0000H to FFFFH. Hear H denoted for Hexadecimal number.

Another things we should know that the 8085 initiates set of signals such as IO/M, RD and WR when it wants to read from and write into memory. Similarly, each memory chip has signals such as CE or CS (chip enable or chip select), OE or RD (output enable or read) and WE or WR (write enable or write) associated with it.

Generation of Control Signals for Memory:

Now come to the main part when the 8085 wants to read from and write into memory, it activates IO/M, RD and WR signals as shown in Table.

Interfacing memory chips with 8085 microprocessor

Table shows the status of IO/M, RD and WR signals during memory read and write operations.

 And interestingly microprocessor 8085 itself using IO/M, RD and WR signals, two control signals MEMR (memory read) and MEMW(memory write) are generated. Fig. 1 shows the circuit used to generate these signals.

Interfacing memory chips with 8085 microprocessor

When is IO/M high, both memory control signals are deactivated irrespective of the status Of RD and WR signals.

Now it will be very helpful to us if we discuss an example. For that we take an example to elaborate the mater.

Ex: Interface an IC 2764 with 8085 using NAND gate address decoder such that the address range allocated to the chip is 0000H – 1FFFH.

Specification of IC 2764:

  • 8 KB (8 x 210 byte) EPROM chip
  • 13 address lines (213 bytes = 8 KB)

Interfacing:

  • 13 address lines of IC are connected to the corresponding address lines of 8085.
  • Remaining address lines of 8085 are connected to address decoder formed using logic gates, the output of which is connected to the CE pin of IC.
  • Address range allocated to the chip is shown in Table 9.
  • Chip is enabled whenever the 8085 places an address allocated to EPROM chip in the address bus. This is shown in Fig.

Interfacing memory chips with 8085 microprocessor Interfacing memory chips with 8085 microprocessor

Hope the discussion clear your concept on interfacing memory chips with 8085 microprocessor.

 

You may also like...

Leave a Reply

Your email address will not be published. Required fields are marked *