# Ripple counter

Now in this post we can discuss on ripple counter. As we know from my previous post regarding what is a counter? Now we start with simplest ripple counter circuit which can be built using **T flip flops** because as we know T flip flop is operate only toggle mode of **JK Flip flop.** So we can easily use it for counting the input pulse of flip flop. Instead of T flip flop we can also use JK flip flops with the toggle property in hand.

The main property of a ripple counter has in this counter all the flip flops are not driven by the same clock pulse. Here the clock pulse is applied to the first flip flop. And the successive **flip flop** is triggered by the output of the previous flip flop. So by this property it is very much clear that ripple counter has cumulative settling time, which limits its speed of operation. As the first stage of the counter changes its state first with the application of the clock pulse to the flip flop and the successive flip flops change their states in turn causing a ripple through effect of the clock pluses. As the signal propagates through the counter in a ripple fashion, it is called a ripple counter.in bellow you will find the block diagram of 3-bit ripple counter.

By 3-bit ripple counter we can count 0-7. Because we know by 3 bit we can represents minimum 0 (000) and maximum 7 (111). The clock inputs of the three flip flops are connected in cascade. The T input of each flip flop is connected to a constant 1, which means that the state of the flip flop will toggle at each negative edge of its clock. Thus the clock input of the first flip flop is connected to the *Clock *line. The other two flip flops have their clock inputs driven by the Q output of the preceding flip flop. Therefore, they toggle their state whenever the preceding flip flop changes its state from Q = 1 to Q = 0, which results in a negative edge of the Q signal. So as we take the output from Q_{0},Q_{1},Q_{2} then we get the count sequence with different counter state as mention bellow on table.