Simultaneous or Flash AD Converter

Now we shall see the simultaneous or flash ad converter .In my earlier post we discuss on how analog to digital converter works? As the name suggest, simultaneous method of A/D conversion is based on using a number of comparators and process of conversion analog to digital running simultaneously. The number of comparators needed for making a n-bit simultaneous or flash a/d converter is 2n1. Let suppose we take an example of two bit simultaneous or flash ad converter. One such system capable of converting an analogue input signal into a two-bit digital output is shown below.

Simultaneous or Flash A/D Converter

 The analogue signal to be digitized serves as one of the inputs to each of the comparators. The second input for each of the comparators is a reference input, different for each comparator. The reference voltages to be used for comparators are in general V/2n, 2V/2n, 3V/2n, 4V/2n and so on. Here, V is the maximum amplitude of the analogue signal that the A/D converter can digitize, and n is the number of bits in the digitized output. In the present case of a two-bit A/D converter, the reference voltages for the three comparators will be V/4, V/2 and 3V/4. If we wanted a three-bit output, the reference voltages would have been V/8, V/4, 3V/8, V/2, 5V/8, 3V/4 and 7V/8. As we see from above diagram that the output status of various comparators depends upon the input analogue signal VA. For instance, when the input VA lies between V/4 and V/2, the C1 output is HIGH whereas the C2 and C3 outputs are both LOW. Now question is what will be output or results? Those possible results shown in bellow table.

Simultaneous or Flash A/D Converter

 Now another question arrived in our mind that how these output comes? Now see the above diagram carefully that outputs of the three comparator can then be fed to a coding network to provide two bits that are the digital equivalent of the input analogue voltage. The bits at the output of the coding network can then be entered into a flip-flop register for storage.

The construction of a simultaneous or flash AD converter is quite straightforward and relatively easy to understand. However, as the number of bits in the desired digital signal increases, the number of comparators required to perform A/D conversion increases very rapidly, and it may not be feasible to use this approach once the number of bits exceeds six or so. The greatest advantage of this technique lies in its capability to execute extremely fast analogue-to-digital conversion.

Hope above discussion clear the working principle of simultaneous or flash AD converter.

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