Masking of Interrupts in 8085 microprocessor

When we study interrupts in 8085 microprocessor then we should know Masking of Interrupts in 8085 microprocessor.  In 8085 microprocessor masking of interrupt can be done for four hardware interrupts INTR, RST 5.5, RST 6.5, and RST 7.5. The masking of 8085 interrupts is done at different levels. In bellow figure shows the organization of hardware interrupts in the 8085 microprocessor.

Masking of Interrupts in 8085 microprocessor

  1. The maskable interrupts are by default masked by the Reset signal. So no interrupt is recognized by the hardware reset.
  2. The interrupts can be enabled by the EI instruction.

      3.  The three RST interrupts can be selectively masked by loading the appropriate word in the accumulator and executing SIM instruction. This is called software masking.

      4. All maskable interrupts are disabled whenever an interrupt is recognized.

      5. All maskable interrupts can be disabled by executing the DI instruction.

If we talk about RST 7.5 interrupt. It alone has a flip-flop to recognize edge transition. The DI instruction reset interrupt enable flip-flop in the processor and the interrupts are disabled. To enable interrupts, EI instruction has to be executed.

SIM Instruction: The SIM instruction is used to mask or unmask RST hardware interrupts. When executed, the SIM instruction reads the content of accumulator and accordingly mask or unmask the interrupts. The format of control word to be stored in the accumulator before executing SIM instruction is as shown in Fig. 2.

Masking of Interrupts in 8085 microprocessor

In addition to masking interrupts, SIM instruction can be used to send serial data on the SOD line of the processor. The data to be send is placed in the MSB bit of the accumulator and the serial data output is enabled by making D6 bit to 1.

RIM Instruction: RIM instruction is used to read the status of the interrupt mask bits. When RIM instruction is executed, the accumulator is loaded with the current status of the interrupt masks and the pending interrupts. The format and the meaning of the data stored in the accumulator after execution of RIM instruction is shown in Fig. 3.

Masking of Interrupts in 8085 microprocessor

 In addition RIM instruction is also used to read the serial data on the SID pin of the processor. The data on the SID pin is stored in the MSB of the accumulator after the execution of the RIM instruction.

Ex: Write an assembly language program to enables all the interrupts in 8085 after reset. EI : Enable interrupts MVI A, 08H : Unmask the interrupts SIM : Set the mask and unmask using SIM instruction. 

Hope the above discussion clear your concept regarding Masking of Interrupts in 8085 microprocessor

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